Graphics processors have become extremely powerful over the past several years and now incorporate many functions such as shading, texturing, and anti-aliasing that dramatically improve video images produced by computing systems. But it is desirable that a graphics processor achieve these improvements without consuming resources of the computing system, since the loss of these resources degrades system performance.
Graphics processors in a computing system receive graphics information from a central processing unit (CPU), and process the graphics information to generate pixel values. The pixel values, or pixels, are stored in a portion of a memory referred to as a display or frame buffer, and then are later retrieved from memory and sent to a display monitor for viewing.
But this memory is shared by other functions of the graphics processor, and in some computer system architectures with the CPU itself. Accordingly, the amount of pixel information retrieved from memory by the graphics processor reduces the amount of information that may be retrieved by other portions of the graphics processor and CPU.
Thus, to the extent that the memory bandwidth used by the graphics processor in reading pixel information is reduced, more memory bandwidth is available for other functions in the computing system, and overall system performance is improved. A simple solution is to store pixels in a separate memory in the graphics processor. But this requires a prohibitively large amount of memory on the processor, which makes the processor undesirably expensive. In short, access to the display buffer and memory in the graphics processor are each expensive, so it is desirable to reduce or limit them both.
Accordingly, what is needed are methods, circuits, and apparatus for reducing the bandwidth used by a graphics processor in reading pixel information from a display buffer. Also, it is further desirable to reduce this bandwidth without adding an excessive amount of circuitry or memory to the graphics processor.